Publications

Year: 2010, 2011, 2012, 2013, 2014, 2015, 2016


2016

[C13] Power and Clock Gating Modelling in Coarse Grained Reconfigurable Systems
Authors:
  Tiziana Fanni, Carlo Sau, Paolo Meloni, Luigi Raffo and Francesca Palumbo

[C12] Adaptable AES Implementation with Power-Gating Support
Authors:
  Subhadeep Banik, Andrey Bogdanov, Tiziana Fanni, Carlo Sau, Luigi Raffo, Francesca Palumbo and Francesco Regazzoni

[J5] Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy
Authors:
Francesca Palumbo, Tiziana Fanni, Carlo Sau and  Paolo Meloni


2015

[C12] Power Modelling for Saving Strategies in Coarse Grained Reconfigurable Systems
Authors:
  Tiziana Fanni, Carlo Sau, Paolo Meloni, Luigi Raffo and Francesca Palumbo

[C11] Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain
Authors:
Carlo Sau, Luca Fanni, Paolo Meloni, Luigi Raffo and Francesca Palumbo

[J4] Automated Design Flow for Multi-Functional Dataflow-Based Platforms
Authors: Carlo Sau, Paolo Meloni, Luigi Raffo, Francesca Palumbo, Simone Casale-Brunet, Endri Bezati and Marco Mattavelli

[J3] Early Stage Automatic Strategy for Power-Aware Signal Processing Systems
Authors:
Carlo Sau, Nicola Carta, Francesca Palumbo and Luigi Raffo

[C10] Automated Power Gating Methodology for Dataflow-Based Reconfigurable Systems
Authors:
Tiziana Fanni, Carlo Sau, Luigi Raffo and Francesca Palumbo

[J2] Coarse-Grained Reconfiguration: Dataflow-Based Power Management
Authors: Francesca Palumbo, Carlo Sau and Luigi Raffo


2014

[C9] Power-Awarness in Coarse-Grained Reconfigurable Designs: a Dataflow Based Strategy
Authors: Francesca Palumbo, Carlo Sau and Luigi Raffo

[C8] Automatic Generation of Dataflow-Based Reconfigurable Co-processing Units
Authors: Carlo Sau and Francesca Palumbo

[C7] Automated Design Flow for Coarse-Grained Reconfigurable Platforms: an RVC-CAL Multi-Standard Decoder Use-Case
Authors: Carlo Sau, Luigi Raffo, Francesca Palumbo, Endri Bezati, Simone Casale-Brunet and Marco Mattavelli

[J1] The Multi-Dataflow Composer Tool: Generation of on-the-fly Reconfigurable Platforms
Authors: Francesca Palumbo, Nicola Carta, Danilo Pani, Paolo Meloni and Luigi Raffo


2013

[C6] A Coarse-Grained Reconfigurable Approach for Low-Power Spike Sorting Architectures
Authors: Nicola Carta, Carlo Sau, Danilo Pani, Francesca Palumbo and Luigi Raffo

[C5] A Coarse-Grained Reconfigurable Wavelet Denoiser Exploiting the Multi-Dataflow Composer Tool
Authors: Nicola Carta, Carlo Sau, Francesca Palumbo, Danilo Pani and Luigi Raffo

[C4] DSE and Profiling of Multi-Context Coarse-Grained Reconfigurable Systems
Authors: Francesca Palumbo, Carlo Sau and Luigi Raffo


2012

[C3] Multi-Purpose Systems: a Novel Dataflow-Based Generation and Mapping Strategy
Authors: Jean-Francois Nezan, Nicolas Siret, Matthieu Wipliez, Francesca Palumbo and Luigi Raffo


2011

[C2] The Multi-Dataflow Composer Tool: a Runtime Reconfigurable HDL Platform Composer
Authors: Francesca Palumbo, Nicola Carta and Luigi Raffo


2010

[C1] RVC: A Multi-Decoder CAL Composer Tool
Authors: Francesca Palumbo, Danilo Pani, Emanuele Manca, Luigi Raffo, Marco Mattavelli and Ghislain Roquier