Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain

Title: Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain

Authors: Carlo Sau, Luca Fanni, Paolo Meloni, Luigi Raffo and Francesca Palumbo
Conference: International Conference on ReConFigurable Computing and FPGAs (ReConFig)
Year: 2015
Abstract:  Flexibility and high efficiency are common design drivers in the embedded systems domain. Coarse-grained reconfigurable coprocessors can tackle these issues, but they suffer of complex design, debugging and applications mapping problems. In this paper, we propose an automated design flow that aids developers in design and managing coarse-grained reconfigurable coprocessors. It provides both the hardware IP and the software drivers, featuring two different levels of coupling with the host processor. The presented solution has been tested on a JPEG codec, targeting a commercial Xilinx Virtex-5 FPGA.
Presentation: ReConFig_2015
Link to full text
Export BibTex: SAU_RECONFIG_2015


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